1. Field of the Invention
The present invention relates to a quadrature demodulator used for a digital radio communication system and the like.
2. Description of the Related Art
FIG. 9 is a block diagram showing a conventional quadrature demodulator. In FIG. 9, reference numeral 101 denotes a quadrature detector, and reference numeral 102 denotes an oscillator. An input signal that has been subjected to a quadrature modulation, that is, an input intermediate frequency signal (hereinafter referred to as an input IF signal), is converted to two quadrature components Ich1 and Qch1 by the quadrature detector 101 and the oscillator 102. Two outputs from the quadrature detector 101 are respectively converted to digital signals Ich3 and Qch3 by an A/D converter 103, and then output to an ROF (roll-off filter) 105. The signals which have been transmitted through the ROF 105 are output to a phase-rotator 104.
Herein, the phase-rotator 104, a PD (phase error detector) 108, a LPF (loop filter) 109, an adder 112 and a NCO (numerically controlled oscillator) 110 constitute a PLL (phase locked loop). In a state where carrier synchronization is not established, a signal indicating an asynchronous state is output from a synchronization detector 107 to a frequency controller 111. In the asynchronous state, the frequency controller 111 outputs a frequency signal such as a triangular wave to the adder 112.
On the other hand, a phase difference between the input IF signal and the output of the oscillator 102 is detected in the PD 108, and high frequency components are removed by the LPF 109. The signal from which the high frequency components are removed by the LPF 109 is output to the adder 112.
The adder 112 adds the output of the frequency controller 111 to the output of the LPF 109, and outputs the results to the NCO 110. The NCO 110 outputs sinusoidal signals (Sin ωt and cos ωt) to the phase-rotator 104, and said sinusoidal signals change their frequencies in accordance with the signal input to the NCO 110. The phase-rotator 104 performs a complex multiplication by use of the output of the ROF 105 and the output of the NCO 110, and performs a phase rotation so as to correct the phase shift between the input IF signal and the output of the oscillator 102. When the carrier synchronization is established, the value of the output of the frequency controller 111 at that time is kept, and the output of the frequency controller 111 is supplied to the NCO 110 via the adder 112.
In such a quadrature demodulator, when the difference between the frequency of the input IF signal and the frequency of the oscillator 102 becomes large, the center of spectrum of a mixer output signal shifts as shown by the broken lines of FIG. 6, and deviates from the pass band of the ROF 105. For this reason, data whose frequency deviates from the band of the ROF 105 vanishes, and deterioration of a bit error rate characteristic or the like is incurred as a result.
As a method to solve the deterioration, for example, a structure is conceived, in which the ROF 105 is arranged on the output side of the phase-rotator 104 as shown in FIG. 10. However, in this structure, the ROF 105 is arranged in the PLL composed of the phase-rotator 104, the PD 108, the LPF 109, the adder 112 and the NCO 110. As the ROF 105, a digital filter is usually used. Since a delay exists between a signal input of the ROF 105 and a signal output of the ROF 105, this PLL has a larger delay than the PLL in the demodulator of FIG. 9, therefore noises caused by the loop itself becomes much, and deteriorates the error rate characteristic. If a noise band width of the loop was narrowed in order to suppress the noises in the loop itself, a deterioration of the error rate characteristic would be essentially inevitable due to phase noises of the oscillator 102 and the like.
And above-mentioned conventional quadrature demodulators are disclosed in Japanese Patent Application Laid-open Publication No. 2000-41074, “Demodulator” (Inventor: Eisaku Sasaki).